NVIDIA seeks a Senior CPU Design Engineer to drive micro-architecture definition, implement RTL (Verilog/SystemVerilog), collaborate with verification and physical design teams, and meet performance, timing and power targets. Requires BS/MS in EE/CE (or equivalent) and 8+ years of experience in micro-architecture and RTL development of high-speed CPU-related designs; proficiency in logic design, physical design/VLSI, and scripting (Python/Perl).

NVIDIA seeks a Senior Software Architect for the GPU Communications Libraries and Networking team to design and implement communication technologies and co-design HW/SW platforms for large-scale DL and HPC clusters. Responsibilities include investigating performance bottlenecks, building proofs-of-concept, simulation and quantitative modeling. Requirements: M.S./Ph.D. or equivalent, 5+ years relevant experience, strong C/C++, experience with parallel programming models and communication runtimes (MPI, NCCL, NVSHMEM, UCX, etc.), deep knowledge of OS, system and network architecture, and strong Linux skills. Locations listed in the US (Westford MA, Austin TX, Durham NC, Santa Clara CA) and Remote. Salary ranges provided for levels 4 and 5 (USD).

Role involves in-depth performance characterization and analysis on large multi-GPU/multi-node clusters, studying HW/SW interactions, implementing micro-benchmarks, triaging customer performance issues, and building tools to visualize performance data. Requires M.S. or equivalent (or PhD), 3+ years of parallel programming and communication runtime experience (e.g., MPI, NCCL, UCX, NVSHMEM), proficiency in C/C++ and a scripting language (preferably Python), and familiarity with containers, cloud provisioning and schedulers (Kubernetes, SLURM, Ansible, Docker).

NVIDIA seeks a Senior System Software Engineer to design, develop, test, and optimize system software for next-generation ARM-based SoCs and datacenter products. Requires 6+ years of relevant experience in computer architecture or software development, strong skills in OS internals, multicore systems, performance analysis (including linux perf), device drivers, and performance optimization; familiarity with CUDA and HPC is a plus.

Design and implement digital and mixed-signal circuit IPs for voltage and noise sensing, perform detailed transistor-level analysis (SPICE, EM/IR, timing) and prototype ideas on test chips. Requires BSEE (MS preferred) and 8+ years of relevant experience; role includes mentoring junior engineers and cross-functional collaboration.

Work on design and implementation of GPU-accelerated libraries and SDKs for unstructured sparsity in deep learning and HPC. Responsibilities include developing a C++ system for sparse tensor computations, DSL specifications for sparse storage formats, on-demand code generation, enabling frameworks like Python/PyTorch, and performance evaluation and optimization. Required: BS/MS/PhD (or equivalent), 6+ years developing and optimizing high-performance C++ software, strong Python and CUDA skills, and experience with parallel programming (MPI/OpenMP) and sparse compilers (MLIR or TACO).

Work on GPU-accelerating high-performance database and ETL applications: analyze and optimize data-intensive workloads, collaborate with hardware/software teams to influence future architectures and programming models. Requires a Master's/PhD or equivalent, 5+ years' relevant experience, strong C/C++ and low-level parallel programming (CUDA, OpenMP, MPI, etc.), and expertise in CPU/GPU architecture and memory subsystems.

The role develops scalable cloud-native services and APIs to support exabyte-scale, high-performance GPU training and inference workflows, working closely with product, platform, SRE, and partner teams. Requires strong foundation in distributed systems, algorithms, data structures, and experience operating backend or cloud-native services (Kubernetes and cloud providers such as AWS/GCP/Azure) using languages like Go, Python, Rust, C/C++, or Java.

NVIDIA seeks a Distinguished Engineer to lead architecture, systems, and software strategy for AI-native wireless infrastructure (RAN and core), drive GPU-accelerated prototyping, and engage with industry standards (3GPP, O-RAN) and partners. The role requires 20+ years of industry experience and deep expertise in communications theory, RAN (5G NR) PHY/L1/L2, baseband signal processing, AI/ML, and programming in Python, C/C++, and Matlab. Salary range provided: 320,000–488,750 USD/year.

Lead the creation and validation of scalable datacenter and cluster designs for enterprise AI/ML, focusing on networking, compute, storage and cloud-native integration. Requires 8+ years in hardware or infrastructure architecture, expertise in datacenter networking (Ethernet, InfiniBand, LAN/WAN, SDN), cluster design, cloud-native patterns and TCO analysis. Position is remote within the US.

Design, implement, and optimize scalable high-performance sparse linear algebra software for GPU architectures (sparse BLAS, direct and iterative solvers, preconditioners, AMG). Collaborate with library engineers, QA, product management, and external partners. PhD/MSc preferred; 5+ years of relevant experience in C++ and parallel programming technologies (CUDA, MPI, OpenMP, OpenACC, pthreads). Salary ranges provided in posting.

Work on JAX core design and performance optimizations for NVIDIA products, collaborating with AI researchers and cross-functional teams. Requires BS or equivalent and 6+ years' relevant experience, proficiency in C/C++ and Python, familiarity with ML frameworks (e.g., PyTorch, TensorFlow), and strong knowledge of CPU/GPU architectures and distributed training. Base salary ranges provided: 184,000–356,500 USD/year depending on level.

Role to serve as the technical voice for NVIDIA GPU and rack-scale systems, translating GPU and system design (NVL72, NVLink, CPU/GPU co-design, power delivery, liquid cooling) into technical content and customer-facing materials. Requires 7+ years of relevant experience and BS/MS or equivalent, with deep expertise in GPU architecture, accelerators, and data center system components.

Lead developer relations efforts for agriscience verticals (seeds/traits, crop protection, plant nutrition, digital agronomy). Responsibilities include technical advising, enablement (sample code, demos, pipelines), partner onboarding and integration, mapping and growing the developer ecosystem, and collaborating with solution architects, engineering, product and marketing. Requires a Master’s/PhD or equivalent and a minimum of 8+ years in agriscience-related roles with 5+ years hands-on domain experience.

Role requires 8+ years in web development and strong experience with Kubernetes (including operators and CSI), Node.js (server-side), Python/Bash scripting, and Linux. Responsibilities include maintaining/developing Kubernetes operators and CSI plugins, building a web-based solution to manage and monitor distributed storage, and working with other teams to define and implement APIs.

Join NVIDIA as a Senior Electrical Product Engineer on HGX GPU-accelerated datacenter platforms. The role involves defining and delivering system-level manufacturing tests, debugging complex HW/FW/SW interactions, ensuring DFx and signal integrity compliance, collaborating with contract manufacturers on assembly and test lines, and driving yield and continuous improvement. Requires BS/MS in EE/CE (or equivalent) and 8+ years industry experience.

NVIDIA seeks a Senior Software Architect for an applied research team building systems-level software to move data between GPUs, nodes, and storage. The role requires 12+ years in systems software and/or networking, expertise in RDMA/InfiniBand/GPUDirect/NVLink, strong C++/Rust skills, and experience with ML system concepts and inference frameworks. Responsibilities include architecting communication libraries, profiling and optimizing data movement, integrating networking into AI stacks, and contributing to open-source projects.

NVIDIA seeks a technical Senior Product Manager to lead GPU-accelerated quantum chemistry math libraries (cuEST, cuEquivariance). Responsibilities include defining go-to-market strategy, creating enablement content (decks, blogs, whitepapers, webinars, demos), presenting to internal/external audiences, and collaborating with product, marketing, developer relations, sales, and PR. Requires 8+ years of product/technical experience, strong foundation in GPU computing/CUDA or parallel programming, familiarity with quantum chemistry/atomistic simulation and AI. Base salary range: 168,000–258,750 USD per year.

Senior engineer responsible for designing and executing performance benchmarking strategies for NVIDIA data center platforms, characterizing AI training/inference and HPC workloads at scale, building automation for monitoring/analysis, identifying bottlenecks across compute/memory/network/storage, and driving performance improvements through tuning and architectural recommendations. Requires MS/PhD or equivalent, 8+ years in performance engineering or system architecture, proficiency with profiling tools, GPU computing (CUDA), HPC networking (InfiniBand/RoCE/NVLink), and programming in Python/C++/shell. Location: US (Santa Clara) and remote; salary ranges provided in posting.

Seeking a technical and strategic Developer Relations Manager to engage Global Systems Integrators, partners, and developer communities to accelerate adoption of NVIDIA AI/GPU platforms. Responsibilities include technical advising, enablement (sample code, guides, demos), onboarding/integration with partners, ecosystem mapping, and cross-functional collaboration. Requires a Bachelor’s/Master’s (or equivalent), 12+ years in technology with at least 5+ years hands-on in the candidate's ecosystem, and strong technical proficiency in HPC, cloud, and AI/ML.