Senior Graphics Shader Compiler Engineer at NVIDIA working on compiler design and implementation, optimizations, code generation for GPUs, and contributions to LLVM, DXC/HLSL and SPIR-V. Requires strong C/C++, compiler experience, and 8+ years of experience.

Join the NeMo Helix Core team to design and implement a plugin-based AI agent execution framework that runs across multiple compute backends (local/docker, Kubernetes, Slurm, on-prem/air-gapped). Responsibilities include owning Core Platform APIs (jobs, data, entities, secrets, RBAC/Auth), extending plugin architecture, improving observability/reliability/performance, contributing in an open-source repo, and building test coverage across unit, integration, E2E, Docker, and Kubernetes workflows. Requires BS/MS or equivalent, 10+ years professional software engineering experience, strong system design, and excellent Python and cloud-native/container orchestration skills.

NVIDIA is hiring a Senior System Software Engineer on the Hypervisor and RTOS Team to design, develop, optimize, and debug RTOS and hypervisor software stacks (bring-up on NVIDIA Tegra SoCs). Requires 8+ years of experience, strong systems programming in C/C++, deep knowledge of RTOS concepts, OS internals, and hardware-assisted virtualization, and experience leading cross-team technical initiatives. Automotive safety and security standards (ASPICE, ISO 26262, ISO 21434) and use of formal methods are listed as desirable. Provided base salary ranges (USD/year) are 184,000–287,500 (Level 4) and 224,000–356,500 (Level 5).

NVIDIA seeks an engineer to develop AI/ML-based tools and LLM integrations to automate performance verification workflows for GPUs, SoCs, and related systems. Responsibilities include building agents to detect regressions and root causes, designing data pipelines for model training, collaborating with verification teams, and measuring automation impact. Requires B.Tech/M.Tech/PhD in EE/CS or related field and 3+ years in hardware verification, performance validation, or EDA tool development.

NVIDIA is hiring a Senior Software Engineer to design and build platforms and automation for large-scale GPU and CPU compute infrastructure supporting EDA workloads. Responsibilities include provisioning, configuration, monitoring, remediation, integration with schedulers and observability systems, and incident response. Requirements include 5+ years supporting large-scale production systems, strong Go or Python programming, Linux and distributed systems experience, and familiarity with schedulers (e.g., Slurm, LSF, Kubernetes) and infrastructure automation. Position available in multiple US locations and remote; salary ranges provided.

Lead design, development, and execution of functional, performance, and security tests for virtual networking silicon (SimX). Develop production-quality Python automation (Pytest, OOP), collaborate with R&D on architecture and debugging, validate fixes, and integrate testing into CI/CD. Requires strong networking protocol knowledge (BGP, OSPF, EVPN, VXLAN, etc.), Linux proficiency, and 5+ years' QA or networking experience.

Lead architecture for cloud-networking and security solutions, design system architecture for DPUs and NICs, build end-to-end solutions from application to hardware, evaluate new technologies and develop prototypes. Requires 5+ years as a Software/Systems Architect, strong software development experience, deep knowledge of C and Python, hands-on Linux development, and experience with networking, virtualization and orchestration technologies.

Technical individual contributor responsible for architecting and hands-on building of a Retail & CPG platform using NVIDIA technologies (NeMo, Nemotron, RAPIDS, cuOpt, CUDA, Triton, TensorRT). Requires 15+ years experience, developer experience building AI agents, and domain familiarity with retail, supply chain or marketplaces; deliver production-ready, cost- and latency-efficient systems and reusable reference architectures.

NVIDIA is hiring a Senior Distributed Software Engineer to lead architecture, design, and development of scalable, reliable distributed storage services optimized for AI/ML. The role requires strong experience with Go, Kubernetes, cloud integrations, and delivery of large-scale distributed services; minimum 8 years industry experience is specified. Responsibilities include building user-space applications, containers, Go-bindings and CLI tools, automating deployment/management/monitoring, and collaborating with cross-functional teams and customers.

Join the System Ethernet QA team to design, develop, and execute tests for virtual ASIC and networking software (SimX). The role requires production-quality Python (OOP) automation, deep networking protocol knowledge (L2/L3, EVPN, VXLAN, QoS, RoCE), Linux proficiency, and 5+ years of QA or networking experience.

Join the System Ethernet QA team to design, develop and execute tests (regression, performance, functional, security) for NVIDIA Ethernet Switch solutions. Responsibilities include reviewing designs, writing Python automation and framework APIs, reporting and helping debug issues. Requires 5+ years QA/networking experience, hands-on switching & routing knowledge (BGP/EVPN, VXLAN/OSPF), multicast and QoS features, Python and Linux Bash skills, and proficient English.

Lead strategy and execution for reinforcement-learning post-training frameworks and related systems (e.g., VeRL, Miles, TorchTitan, Ray, Megatron-Core) on NVIDIA platforms. Responsibilities include setting technical priorities, benchmarking and reproducibility, multi-team coordination across research, product, hardware and open-source partners, and hiring and developing managers and senior engineers. Requires MS/PhD or equivalent, 10+ years software engineering experience and 4+ years managing engineering teams; strong background in distributed AI systems, ML infrastructure, and high-performance computing.

Work across research, engineering, and product teams to develop workflows, profile and benchmark applications, build example/tutorial applications, and represent NVIDIA at scientific events. Requires 5+ years building HPC/AI/ML software for physics and numerical simulations and strong experience with GPU-accelerated computing and modern ML frameworks.

Work on developing algorithms and high-performance software to accelerate simulation of quantum error correction workloads using GPUs and HPC technologies. Collaborate with research, product, and external partners; mentor specialists; and convert research-level algorithms into robust, reusable software. Requires expertise in QEC/stabilizer formalism, noise models, GPU/CUDA development, and 8+ years of relevant experience.

Lead design and implementation of evaluation methodologies, benchmark environments, and evaluation infrastructure (pipelines, CI, statistical tooling) for reasoning, multimodal, long-context, and agentic systems. Partner with research, training, and product teams to translate evaluation signals into release decisions and training directions. Requires 6+ years of hands-on experience with LLMs/multimodal evaluations and strong statistical foundations.

NVIDIA is hiring engineers to work on CUDA Tile and TensorIR compiler technologies for GPUs. Responsibilities include designing and implementing compiler transformations, MLIR dialects and lowering passes, defining public APIs, and optimizing tile-based kernels for performance across NVIDIA GPU architectures. Required: BS/MS/PhD or equivalent and 3+ years' experience in compiler optimization, performance analysis, IR design, and strong C/C++ skills.

Role to architect and implement OpenBMC support for platforms where the BMC manages both host system and coordinated top-of-rack Ethernet switch functionality. Responsibilities include defining switch-management architecture (D-Bus, Redfish, bmcweb), developing object models and services for switch inventory and networking features (VLANs, LAGs, FDB, PHYs), building backend abstractions (switchdev, SAI/SONiC, DENT, vendor SDKs), and working cross-functionally to productize the architecture. Requires strong firmware and Linux networking experience and proficiency in C/C++ and Python.

Role involves defining and building system-level methodologies and tools for efficient, scalable SOC development; identifying front-end implementation inefficiencies; owning front-end design quality checks; and collaborating with ASIC, physical design, CAD, package, software and DFT teams. Requires a Master's in Computer or Electrical Engineering (or equivalent), 8+ years chip design experience, RTL (Verilog), verification (UVM/SystemVerilog), design automation, and scripting (Perl/Python).

NVIDIA is hiring a Senior DevTech Compute Engineer to prototype and integrate GPU-accelerated approaches for compression, dataframes, and distributed data processing. Requires a MS/PhD or equivalent experience, at least 5 years relevant experience, strong C/C++ and low-level parallel programming skills (CUDA/ROCm/other), and domain expertise in data compression, codecs, or high-performance distributed databases. Role involves performance analysis, hardware/software co-design, and customer/CSP integration.

Design and implement lane-level navigation and localization systems using standard navigation maps for autonomous vehicles. Responsibilities include implementing efficient C++ code, evaluating algorithms on large real-world and synthetic datasets, productizing software for deployment to consumer cars, and following automotive safety and quality standards (MISRA, ISO26262). Requires BS/MS/PhD or equivalent, 8+ years experience, strong algorithm design skills, and excellent communication/teamwork.