Lead research and engineering to build physics-informed synthetic data pipelines, surrogate models, RL/online learning-based calibration policies, and GPU-accelerated real-time AI systems for fault-tolerant quantum computing. Requires MS (PhD preferred) and 8+ years of experience in quantum systems and ML; role is US-based/remote with specified Santa Clara and Redmond locations.

NVIDIA is hiring a Senior DL Hardware Modeling Architect to develop executable component- and system-level models for LLM inference. The role requires 5+ years of relevant experience, expert C++ programming, familiarity with RTL and chip design concepts, and experience in profiling and performance analysis. Location listed as US (hybrid/remote). Base salary ranges provided: $152,000–$241,500 (Level 3) and $184,000–$287,500 (Level 4). Applications accepted at least until August 10, 2026.

Role at NVIDIA on the perception team to design end-to-end perception solutions for autonomous vehicles (lane graphs, road boundaries, traffic elements) using deep learning. Responsibilities include applied research, working with large data and labeling teams, simulation/augmentation, and productizing models to meet safety, latency, and robustness requirements. Minimum experience varies by degree (PhD 4+, MS 6+, BS 8+).

Owner of AI application readiness and system-level performance for DGX Station: profile workloads, identify GPU/NVLink/memory/host bottlenecks, drive optimizations across kernels, frameworks, and compilers, validate the full NVIDIA AI stack, and maintain benchmarking and regression infrastructure. Requires deep experience with CUDA, GPU profiling tools, deep learning frameworks (PyTorch/TensorFlow/JAX), and multi-GPU performance tuning.

Lead and mentor engineers to plan, schedule, and execute projects to create, optimize, and deploy training and inference deep learning workloads. Coordinate across teams and geographies, work on optimized numerical and DL algorithms, interact with scientific teams, and occasionally travel to conferences or customers. Minimum BSc and 8 years related experience (including 3 years management).

Lead the engineering team within NVIDIA's Dynamo organization to advance AIPerf (an open-source inference benchmarking platform). Responsibilities include driving core infrastructure (load generation, ZMQ microservices, GPU telemetry, Prometheus, statistical confidence intervals, Kubernetes-native deployment), advising integrations with vLLM/TRT-LLM/SGLang, and hiring/mentoring senior engineers. Requires 8+ years software engineering experience and 3+ years engineering leadership.

Role involves architecting and deploying agentic GenAI/LLM solutions for telecommunications network operations (telemetry, logs, SNMP, NetFlow/IPFIX, time-series), enabling NVIDIA Telco partners on NVIDIA AI stacks (Morpheus, RAPIDS, NeMo, NIM), and providing technical guidance for production integration. Requires 6+ years building and deploying AI/ML systems, strong Python and PyTorch experience, and familiarity with telecom data and related tooling.

NVIDIA is hiring a Senior Compiler Engineer - AI to design and implement learning-based compiler optimization workflows and integrate LLM systems with compiler infrastructure. The role requires 8+ years of software engineering and AI/ML experience, strong knowledge of compilers, code generation, GPU architecture, hands-on LLVM/MLIR experience, and proficiency in Python and C/C++. Locations listed include US (Redmond, Santa Clara, Austin) and remote. Base salary range listed: 184,000 USD - 287,500 USD per year.

Role involves integrating new CUDA features and runtime abstractions into AI frameworks, performing workload and performance analysis, collaborating with researchers and architects, and developing runtime/tools for multi-GPU and multi-node deep learning workloads. Requires 8+ years industry experience, strong skills in CUDA, C++, Python, deep learning frameworks, distributed ML techniques, and performance profiling/benchmarking.

Work on research-oriented projects that bridge deep learning frameworks and low-level CUDA to optimize performance from single GPUs to cluster-scale supercomputers. Responsibilities include designing and optimizing custom CUDA kernels, architecting distributed compute systems, profiling hardware-software interactions, and collaborating with researchers and compiler/driver teams. Requires 8+ years experience and strong background in deep learning (transformers), systems programming, and GPU performance optimization.

NVIDIA seeks a Developer Advocate focused on reinforcement learning and LLM post-training pipelines to build demos, write developer-facing content, collaborate on product launches, and engage developers via events and online channels. Requires 5+ years relevant experience (including 3 years engineering), experience with RL libraries and AI frameworks such as PyTorch, JAX, and NeMo-RL. Salary ranges provided for different levels (USD 152,000–241,500 for Level 3; USD 184,000–287,500 for Level 4).

Work on the open-source Triton compiler to design and implement compiler technology (using MLIR and Triton's Python DSL), optimize high-level kernels to efficient low-level GPU code, and hand-tune critical paths (inline PTX). Collaborate with hardware architects and the CUDA compiler team; experience tuning BLAS/deep-learning kernels, numerics/linear algebra, and ML compilers (TVM/MLIR) is a plus. Base salary range: 184,000 USD - 287,500 USD per year.

Role focuses on building performance testing frameworks, automated CI/CD pipelines, benchmarking systems, and dashboards to track and analyze GPU and compiler performance across models and hardware. Requires 5+ years software engineering experience, strong Python (C++ a plus), familiarity with deep learning frameworks (PyTorch/TensorFlow/JAX/TensorRT), GPU/hardware-aware performance analysis, profiling, and debugging across software and hardware layers. Base salary range listed: 152,000 USD–241,500 USD.

NVIDIA seeks a Senior DL Algorithms Engineer to enable and optimize open LLM/Omni models (e.g., Nemotron, Cosmos) on NVIDIA's accelerated inference software stack. Responsibilities include contributing to open-source frameworks (TRT-LLM, vLLM, SGLang, FlashInfer), profiling and removing bottlenecks across the inference stack, benchmarking, and co-designing with partner teams. Requires 3+ years' experience, strong deep learning and inference background, GPU performance optimization, PyTorch or equivalent, and understanding of computer/GPU architecture.

Role focuses on research, implementation, and validation of model and algorithm improvements for human-centric video generation and world models. Responsibilities include prototyping spatial multimodal and neural-rendering approaches, improving training and inference efficiency, defining training objectives for sim-to-real/real-to-sim generalization, building domain-specific benchmarks, and translating research into production-grade checkpoints and integrations. Requires PhD or equivalent, 8+ years applied research/industry experience, 3+ years designing/training generative models, and advanced proficiency in Python, PyTorch, C++, and CUDA.

Build and optimize inference stacks (vLLM), develop and tune GPU kernels, extend compiler/DSL infrastructure, define benchmarking (including MLPerf), and architect containerized large-scale inference deployments. Requires strong Python and C/C++ skills, GPU/CUDA experience, familiarity with PyTorch and inference engines, container/orchestration experience, and advanced performance engineering; typical experience expectations are 7+ years (BS) or 5+ years (MS).

NVIDIA is hiring for its Deep Learning Compiler (DLC) team to develop compiler optimization algorithms, performance optimizations, and compiler infrastructure for neural networks used across data centers, devices, automotive, and robotics. The role requires 3+ years of relevant work or research experience, proficiency in C/C++ and Python, and familiarity with technologies such as CUDA/OpenCL, MLIR, XLA, TVM, LLVM, and deep learning frameworks like PyTorch. Base salary range: 152,000 USD - 241,500 USD per year.

Develop and optimize GPU-accelerated AI inference serving software, drive convergence of Triton and Dynamo stacks, and contribute to open source. Requires MS/PhD or equivalent experience, 5+ years on deep learning software, strong Rust and C++ skills, familiarity with Python, and experience with high-scale distributed and ML systems.

Work on architecting and building reinforcement-learning post-training infrastructure that scales from single-GPU experimentation to production across thousands of nodes. Responsibilities include optimizing training-inference-rollout loops on GPUs/CPUs/LPUs, improving RL frameworks (e.g., VeRL, Miles, TorchTitan), ensuring fault tolerance and elastic scaling, and collaborating with researchers and hardware/software teams. Requires MS/PhD or equivalent experience and 5+ years in distributed systems, HPC, deep learning infrastructure, or ML systems engineering.

Principal role to define roadmaps and lead design of communication libraries (NCCL, UCX, UCC, NVSHMEM, MPI) and collective algorithms for trillion-parameter models; requires 12+ years in HPC/distributed deep learning, expertise in RDMA/RoCE/InfiniBand, CUDA/GPU memory hierarchy, 3D parallelism and inference/serving technologies (e.g., TensorRT-LLM, vLLM). Salary range provided: 272,000–431,250 USD/year.