NVIDIA seeks a Senior Architect to guide software design, architecture, and implementation of cost, power, and performance modeling for datacenter-scale GPU-accelerated platforms. Requires 8+ years in systems architecture and modeling, strong Python skills, and experience with datacenter/server architecture, parallel computing, data analysis, and DevOps practices.

Lead software architecture for NVIDIA deep learning server platforms, designing end-to-end software and firmware across application software, libraries, system software and firmware. Collaborate with customers, partners and cross-functional teams; make key technical decisions and mentor engineering teams. Requires 10+ years in system architecture/design, BS/MS or equivalent, and knowledge of management protocols (Redfish, IPMI, MCTP, PLDM, RDE), cloud/cluster deployment, storage and networking.

Role to drive server management and firmware architecture for large clusters and data centers deploying NVIDIA GPUs and Grace solutions. Responsibilities include working with data center architects and customers to define requirements, owning firmware quality, reliability and telemetry, collaborating with internal leads on health management workflows, and resolving cluster bring-up issues. Requires 15+ years of server firmware (BMC) and platform software experience, strong C/C++ and Python skills, and experience with data center manageability and SCM tools (Git/Perforce) and Jira.

Lead architecture for cloud-networking and security solutions, design system architecture for DPUs & NICs, build end-to-end solutions from application to hardware level, evaluate technologies and develop prototypes. Requires 5+ years as a Software or Systems Architect, strong software development experience, deep knowledge of C and Python, Linux development, cloud-networking and networking protocols; experience with DPDK, OVS/OVN, containers and Kubernetes is a plus.

NVIDIA seeks a Software Engineering Manager for image and data compression libraries (US-based, hybrid/remote). Role requires at least five years' experience including three or more years managing teams; strong technical skills in C++ and Python; experience with parallel programming and performance optimization on modern architectures (CUDA, MPI, NVSHMEM, NCCL, AVX, etc.); and familiarity with image processing and compression algorithms. Base salary range: 200,000 USD - 322,000 USD.

Join a team developing GPU-accelerated dense linear algebra libraries (e.g., cuSOLVER). Responsibilities include designing, implementing, and optimizing kernels (triangular factorizations, eigenvalue and singular value decompositions), providing technical leadership, and collaborating with product and QA. Requires MSc/PhD or equivalent and 5+ years developing high-performance numerical linear algebra software (C++, CUDA, MPI/OpenMP/OpenACC/pthreads).

Join NVIDIA's Developer Technology team to research and develop GPU acceleration techniques for deep learning, machine learning, and other AI domains. Role involves in-depth analysis and optimization of complex AI and HPC algorithms, collaboration with research and engineering teams, and publishing findings. Requires a Master’s (or equivalent), 8+ years relevant experience, programming fluency in C/C++, and experience with parallel programming (CUDA, OpenACC, OpenMP, MPI, pthreads) and low-level performance optimizations. Locations listed in the US with hybrid/remote options; posted salary ranges provided by level.

Responsible for designing, implementing, and optimizing high-performance dense linear algebra software on GPUs, leading projects and mentoring engineers. Requires 8+ years experience, a degree in CS/Applied Math or equivalent, strong C++ skills, expertise in kernel generation and JIT, and experience with GPU-related technologies (CUDA) and performance optimization. Base salary range shown: $184,000–$356,500 depending on level.

Responsible for designing, implementing and bringing up OpenBMC firmware for NVIDIA server platforms, performing performance analysis, developing manageability features and ensuring product security and testability. Role requires board bring-up and device driver experience, familiarity with standards (Redfish, PLDM, MCTP, SPDM, IPMI), strong Linux and systems programming skills (C/C++, Python, Go, Bash), and a minimum of 8 years' experience.

Senior HPC Architect role at NVIDIA to support deployment and bring-up of large-scale GPU compute clusters. Requires 8+ years of experience with accelerated computing in datacenter/HPC environments, programming/scripting (C/C++/Python/Bash), parallel filesystems, scheduling and I/O stacks, and system administration. Experience with containers, telemetry/visualization pipelines, and Linux performance tools is a plus.

NVIDIA seeks a Developer Relations Manager focused on CAE for higher education and research to lead strategic relationships, drive early product adoption, host developer events, and advise product teams. Requires MS/PhD or equivalent, 12+ years in applied research for engineering simulation, and 6+ years in higher education or research lab leadership. Role is based in the US (multiple states listed) and the posting lists a base salary range of 224,000–356,500 USD per year.

Work with Financial Services capital markets clients to perform proofs-of-concept, profile and optimize ML/DL models for NVIDIA GPU architectures, collaborate with engineering/product/sales teams, build industry-focused collateral (notebooks/blogs), and enable deploying models at scale on cloud and on-prem HPC. Requires 12+ years experience and proficiency in Python and C++.

NVIDIA seeks a Senior CPU Design Engineer to drive micro-architecture definition, implement RTL (Verilog/SystemVerilog), collaborate with verification and physical design teams, and meet performance, timing and power targets. Requires BS/MS in EE/CE (or equivalent) and 8+ years of experience in micro-architecture and RTL development of high-speed CPU-related designs; proficiency in logic design, physical design/VLSI, and scripting (Python/Perl).

NVIDIA seeks a Senior Software Architect to co-design next-generation data center platforms and scalable communications software (NCCL, NVSHMEM, UCX) for Deep Learning and HPC. Requires M.S./Ph.D. or equivalent, 5+ years' relevant experience, strong C/C++ and Linux skills, experience with parallel programming/communication runtimes (MPI, NCCL, NVSHMEM, UCX, etc.), and knowledge of network and system architecture. Locations include multiple US offices and remote; posted salary range 184,000–356,500 USD/year (varies by level).

NVIDIA seeks a Senior System Software Engineer to design, develop, test, and optimize system software for next-generation ARM-based SoCs and datacenter products. Requires 6+ years of relevant experience in computer architecture or software development, strong skills in OS internals, multicore systems, performance analysis (including linux perf), device drivers, and performance optimization; familiarity with CUDA and HPC is a plus.

Hands-on Senior GenAI Engagement Lead responsible for deep technical integration of NVIDIA GenAI offerings with strategic ISV and CSP partners. Requires 8+ years in technical product or engineering roles, advanced degree or equivalent, and strong hands-on experience with RAG, multi-agent architectures, production LLM deployments, NVIDIA libraries (NeMo, Triton, TensorRT), vLLM, LangChain, vector DBs, and cloud deployments across AWS/Azure/GCP. Will define technical objectives, build reference architectures and prototypes, and work closely with Product, Engineering, Research, and Partner teams. Posted location: US (Santa Clara) with remote/hybrid indications. Salary ranges provided in posting.

Responsible for architecture and implementation of fleet health monitoring, telemetry collection and visualization, fault remediation, and scalable solutions for GPU-based AI infrastructure. Requires 5+ years coding experience, strong skills in C/C++ and Python, experience with time-series databases (InfluxDB/Prometheus), Grafana, REST APIs (Redfish a plus), firmware knowledge, and experience with SCM and project tools (Git, Perforce, Jira).

Lead architecture and development of vehicle and sensor abstraction layers (VAL/SAL), design plugin frameworks and interfaces to sensors and actuators, and improve integration across vehicle and sensor configurations. Responsible for developing production-quality C++ code (including GPGPU/CUDA), validating through real-world and synthetic testing, following automotive safety/quality standards (e.g., MISRA), and managing teams. Requires MS (or equivalent), 12+ years relevant experience and 8+ years of management experience.

Experienced circuit designer to perform transistor-level analysis, SPICE simulations, EM/IR and static timing analysis, and to drive design and implementation of digital and mixed-signal IPs for voltage/noise sensing. Role includes collaboration with cross-functional teams, prototyping on test chips, and mentoring junior engineers.

Work on design and implementation of GPU-accelerated libraries and SDKs for unstructured sparsity in deep learning and HPC. Responsibilities include developing a C++ system for sparse tensor computations, DSL specifications for sparse storage formats, on-demand code generation, enabling frameworks like Python/PyTorch, and performance evaluation and optimization. Required: BS/MS/PhD (or equivalent), 6+ years developing and optimizing high-performance C++ software, strong Python and CUDA skills, and experience with parallel programming (MPI/OpenMP) and sparse compilers (MLIR or TACO).